Barretenberg
The ZK-SNARK library at the core of Aztec
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formal_proofs.cpp
Go to the documentation of this file.
1#include "acir_loader.hpp"
5#include "helpers.hpp"
6
8{
9 solver->print_assertions();
11 for (auto const& i : vals) {
12 info(i.first, " = ", i.second);
13 }
14}
15
17{
18 auto a = circuit["a"];
19 auto b = circuit["b"];
20 auto c = circuit["c"];
21 auto cr = a + b;
22 c != cr;
23 bool res = solver->check();
24 if (res) {
25 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c }, { "cr", cr } });
26 debug_solution(solver, terms);
27 }
28 return res;
29}
30
32{
33 auto a = circuit["a"];
34 auto b = circuit["b"];
35 auto c = circuit["c"];
36 auto cr = a - b;
37 c != cr;
38 bool res = solver->check();
39 if (res) {
40 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c }, { "cr", cr } });
41 debug_solution(solver, terms);
42 }
43 return res;
44}
45
47{
48 auto a = circuit["a"];
49 auto b = circuit["b"];
50 auto c = circuit["c"];
51 auto cr = a * b;
52 c != cr;
53 bool res = solver->check();
54 if (res) {
55 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c }, { "cr", cr } });
56 debug_solution(solver, terms);
57 }
58 return res;
59}
60
62{
63 auto a = circuit["a"];
64 auto b = circuit["b"];
65 auto c = circuit["c"];
66 auto cr = a / b;
67 c != cr;
68 bool res = solver->check();
69 if (res) {
70 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c }, { "cr", cr } });
71 debug_solution(solver, terms);
72 }
73 return res;
74}
75
77{
78 auto a = circuit["a"];
79 auto b = circuit["b"];
80 auto c = circuit["c"];
81 // c = a / b
82 // c * b = a
83 auto cr = c * b;
84 a != cr;
85 bool res = solver->check();
86 if (res) {
87 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c }, { "cr", cr } });
88 debug_solution(solver, terms);
89 }
90 return res;
91}
92
94{
95 auto a = circuit["a"];
96 auto b = circuit["b"];
97 auto c = circuit["c"];
98 smt_circuit::STerm c1 = a % b;
99 c != c1;
100 bool res = solver->check();
101 if (res) {
102 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c }, { "c1", c1 } });
103 debug_solution(solver, terms);
104 }
105 return res;
106}
107
109{
110 auto a = circuit["a"];
111 auto b = circuit["b"];
112 auto c = circuit["c"];
113 auto cr = a | b;
114 c != cr;
115 bool res = solver->check();
116 if (res) {
117 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c }, { "cr", cr } });
118 debug_solution(solver, terms);
119 }
120 return res;
121}
122
124{
125 auto a = circuit["a"];
126 auto b = circuit["b"];
127 auto c = circuit["c"];
128 auto cr = a & b;
129 c != cr;
130 bool res = solver->check();
131 if (res) {
132 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c }, { "cr", cr } });
133 debug_solution(solver, terms);
134 }
135 return res;
136}
137
139{
140 auto a = circuit["a"];
141 auto b = circuit["b"];
142 auto c = circuit["c"];
143 auto cr = a ^ b;
144 c != cr;
145 bool res = solver->check();
146 if (res) {
147 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c }, { "cr", cr } });
148 debug_solution(solver, terms);
149 }
150 return res;
151}
152
153// takes 0.346 seconds on SMTBOX
155{
156 auto a = circuit["a"];
157 auto b = circuit["b"];
158 // 2**127 - 1
159 auto mask = smt_terms::BVConst("170141183460469231731687303715884105727", solver, 10);
160 auto br = a ^ mask;
161 b != br;
162 bool res = solver->check();
163 if (res) {
164 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "br", br } });
165 debug_solution(solver, terms);
166 }
167 return res;
168}
169
171{
172 auto a = circuit["a"];
173 auto b = circuit["b"];
174 auto c = circuit["c"];
175 auto cr = shl32(a, b, solver);
176 c != cr;
177 bool res = solver->check();
178 if (res) {
179 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c }, { "cr", cr } });
180 debug_solution(solver, terms);
181 }
182 return res;
183}
184
186{
187 auto a = circuit["a"];
188 auto b = circuit["b"];
189 auto c = circuit["c"];
190 auto cr = shl64(a, b, solver);
191 c != cr;
192 bool res = solver->check();
193 if (res) {
194 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c }, { "cr", cr } });
195 debug_solution(solver, terms);
196 }
197 return res;
198}
199
201{
202 auto a = circuit["a"];
203 auto b = circuit["b"];
204 auto c = circuit["c"];
205 auto cr = shr(a, b, solver);
206 c != cr;
207 bool res = solver->check();
208 if (res) {
209 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c }, { "cr", cr } });
210 debug_solution(solver, terms);
211 }
212 return res;
213}
214
216{
217 auto a = circuit["a"];
218 auto b = circuit["b"];
219 auto c = circuit["c"];
220 a == b;
221 c != 1;
222 bool res = solver->check();
223 if (res) {
224 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c } });
225 debug_solution(solver, terms);
226 }
227 return res;
228}
229
231{
232 auto a = circuit["a"];
233 auto b = circuit["b"];
234 auto c = circuit["c"];
235 a != b;
236 c != 0;
237 bool res = solver->check();
238 if (res) {
239 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c } });
240 debug_solution(solver, terms);
241 }
242 return res;
243}
244
246{
247 auto a = circuit["a"];
248 auto b = circuit["b"];
249 auto c = circuit["c"];
250 a < b;
251 c != 1;
252 bool res = solver->check();
253 if (res) {
254 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c } });
255 debug_solution(solver, terms);
256 }
257 return res;
258}
259
261{
262 auto a = circuit["a"];
263 auto b = circuit["b"];
264 auto c = circuit["c"];
265 a > b;
266 c != 0;
267 bool res = solver->check();
268 if (res) {
269 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c } });
270 debug_solution(solver, terms);
271 }
272 return res;
273}
274
275bool verify_idiv(smt_solver::Solver* solver, smt_circuit::UltraCircuit circuit, uint32_t bit_size)
276{
277 auto a = circuit["a"];
278 auto b = circuit["b"];
279 auto c = circuit["c"];
280 auto cr = idiv(a, b, bit_size, solver);
281 c != cr;
282 bool res = solver->check();
283 if (res) {
284 std::unordered_map<std::string, cvc5::Term> terms({ { "a", a }, { "b", b }, { "c", c }, { "cr", cr } });
285 debug_solution(solver, terms);
286 }
287 return res;
288}
289
291{
292 auto schema = loader->get_circuit_schema();
294 solver,
295 type,
296 /*equal_vars=*/{ "a" },
297 /*distinct_vars=*/{ "b" },
298 /*equal_at_the_same_time=*/{},
299 /*not_equal_at_the_same_time=*/{},
300 /*enable_optimizations=*/true);
301 bool res = solver->check();
302 if (res) {
303 debug_solution(solver, {});
304 }
305 return res;
306}
Class for loading ACIR (Arithmetic Circuit Intermediate Representation) programs and converting them ...
smt_circuit::CircuitSchema get_circuit_schema()
Gets the circuit schema from the loaded ACIR program.
Symbolic Circuit class for Standard Circuit Builder.
static std::pair< UltraCircuit, UltraCircuit > unique_witness_ext(CircuitSchema &circuit_info, Solver *s, TermType type, const std::vector< std::string > &equal={}, const std::vector< std::string > &not_equal={}, const std::vector< std::string > &equal_at_the_same_time={}, const std::vector< std::string > &not_equal_at_the_same_time={}, bool enable_optimizations=false)
Check your circuit for witness uniqueness.
Class for the solver.
Definition solver.hpp:80
void print_assertions()
Definition solver.cpp:421
std::unordered_map< std::string, std::string > model(std::unordered_map< std::string, cvc5::Term > &terms) const
Definition solver.cpp:80
Symbolic term element class.
Definition term.hpp:114
void info(Args... args)
Definition log.hpp:70
FF a
FF b
bool verify_shl32(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify 32-bit left shift operation: c = a << b.
bool verify_idiv(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit, uint32_t bit_size)
bool verify_xor(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify bitwise XOR operation: c = a ^ b.
bool verify_mod(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify modulo operation: c = a mod b.
void debug_solution(smt_solver::Solver *solver, std::unordered_map< std::string, cvc5::Term > terms)
Debug helper to print solver assertions and model values.
bool verify_not_127(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify NOT operation on 127 bits: b = ~a.
bool verify_lt(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify less than comparison: a < b.
bool verify_div_field(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify field division operation: c = a / b (in field)
bool verify_div(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify integer division operation: c = a / b.
bool verify_mul(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify multiplication operation: c = a * b.
bool verify_add(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify addition operation: c = a + b.
bool verify_eq_on_inequlaity(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify equality comparison when values are not equal.
bool verify_sub(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify subtraction operation: c = a - b.
bool verify_shl64(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify 64-bit left shift operation: c = a << b.
bool verify_non_uniqueness_for_casts(smt_solver::Solver *solver, AcirToSmtLoader *loader, smt_circuit::TermType type)
Verify non-uniqueness for casts.
bool verify_and(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify bitwise AND operation: c = a & b.
bool verify_shr(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify right shift operation: c = a >> b.
bool verify_eq_on_equlaity(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify equality comparison when values are equal.
bool verify_or(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify bitwise OR operation: c = a | b.
bool verify_gt(smt_solver::Solver *solver, smt_circuit::UltraCircuit circuit)
Verify greater than comparison: a > b.
smt_circuit::STerm shr(smt_circuit::STerm v0, smt_circuit::STerm v1, smt_solver::Solver *solver)
Right shift operation.
Definition helpers.cpp:40
smt_circuit::STerm idiv(smt_circuit::STerm v0, smt_circuit::STerm v1, uint32_t bit_size, smt_solver::Solver *solver)
Signed division in noir-style.
Definition helpers.cpp:61
smt_circuit::STerm shl32(smt_circuit::STerm v0, smt_circuit::STerm v1, smt_solver::Solver *solver)
Left shift operation with 32-bit truncation.
Definition helpers.cpp:54
smt_circuit::STerm shl64(smt_circuit::STerm v0, smt_circuit::STerm v1, smt_solver::Solver *solver)
Left shift operation with 64-bit truncation.
Definition helpers.cpp:47
STerm BVConst(const std::string &val, Solver *slv, uint32_t base)
Definition term.cpp:620
TermType
Allows to define three types of symbolic terms STerm - Symbolic Variables acting like a Finte Field e...
Definition term.hpp:15
constexpr decltype(auto) get(::tuplet::tuple< T... > &&t) noexcept
Definition tuple.hpp:13